Layout Optimization in VLSI Design Network Theory and Applications

Name: Layout Optimization in VLSI Design Network Theory and Applications
Brand: Kluwer Academic Publishers Group
SKU: 19568900
Price: 4168.00 ZAR
Availability: InStock

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The exponential scaling of feature sizes in semiconductor technologies has side-effects on layout optimization, related to effects such as interconnect delay, noise, crosstalk, signal integrity, parasitics effects, and power dissipation, that invalidate the assumptions that form ... Read more

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Features

Author	Bing Lu
Format	Hardcover
ISBN	9781402000898
Publication Date	03/09/2006
Publisher	Kluwer Academic Publishers
Manufacturer	Kluwer Academic Publishers Group

Description

This book is intended to sample the most important, contemporary, and advanced layout optimization problems emerging with the advent of very deep submicron technologies in semiconductor processing. Audience: A reference work for graduate students, senior undergraduates, and researchers.

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