| Author | Alan Hunter , Janick Bergeron , Eduard Cerny |
| Format | Hardcover |
| ISBN | 9780387255385 |
| Publisher | Springer-Verlag New York Inc. |
| Manufacturer | Springer-verlag New York Inc. |
SystemVerilog is a unified language that serves both design and verification engineers by including RTL design constructs, assertions and a rich set of verification constructs. This book is based upon best verification practices by ARM, Synopsys and their customers. It is useful for those involved in the design or verification of a complex chip.
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